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 Agilent ACPM-7891
Tri-Band Power Amplifier Module EGSM, DCS and PCS Multi-slot GPRS Data Sheet and Application Note
Features * Highest Power Added Efficiency in the industry * Performance guaranteed for GPRS Class 10 (2-Slot) transmit operation * Broadband DCS/PCS match for flat Pout and PAE * Low harmonics * Single 3.5 Volt supply (nominal) * 50 Ohms input & output impedance * Small SMT package 6 x 12 x 1.4 mm
13 Gnd 12 Gnd 11 RFout DCS/PCS 10 Gnd
Description The ACPM-7891 is a fully matched tri-band EGSM/DCS/ PCS power amplifier module designed on Agilent Technologies' leading edge Enhancement Mode PHEMT (E-pHEMT) process. The ACPM-7891 has the highest Power-added Efficiency (PAE) for all three bands of operation in the industry, enabling customers to design handset, PDA and data card with up to 15% longer transmit or talk time. The Agilent ACPM-7891 provides a cost effective dual or tri-band GSM PA solution with the additional benefit of excellent efficiency enabling multi-slot GPRS operation and extended transmit time. The device is internally matched to 50 and therefore an effective design can be implemented quickly with a few additional capacitors for d.c. blocking of the output ports and bypassing of the supply pins.
Pin Connections and Package Marking
Gnd Vapc DCS/PCS Gnd Vdd3 DCS/PCS
17 16 15 14 RFin DCS/PCS Gnd Vdd1,2 DCS/PCS Vdd1,2 Bypass Gnd Vdd1,2 Bypass Vdd1,2 EGSM Gnd RFin EGSM 18 19 20 21
Specifications * 60% PAE at +35 dBm Pout for ESGM * 56% PAE at +32.5 dBm Pout for DCS 1800 * 56% PAE at +32.5 dBm Pout for PCS 1900
22 23 24 25 26 1 2
YYWWDDLLLL
3 4
9 Gnd 8 Gnd RFout 7 EGSM 6 Gnd 5 Gnd
Agilent ACPM-7891
Gnd Vapc EGSM Gnd Vdd3 EGSM
Applications * Cellular handsets * Data modules for PDA
Notes: Package marking provides orientation and identification. "YYWWDDLLLL" = Year, Week, Day and Lot Code indicates the year, week, day and lot of manufacture.
* Data cards for laptops
Absolute Maximum Ratings Symbol
Vdd Pin max Vapc IDS TSTG
Parameter
Supply Voltage Input Power Gain Control Voltage Operating Case Temperature Storage Temperature
Units
V dBm V C C
Absolute Maximum
6 +10 4 -30 to 90 -40 to 125
Common Electrical Characteristics
Test conditions Vdd = +3.5V, a pulse width of 1154 s and a duty cycle of 25% at a case temperature of +25C unless otherwise stated.
Parameter
Supply Voltage Leakage Current Control Voltage Range Control Current Nominal Input Impedance Nominal Output Impedance Rise And Fall Time
Test Conditions
Symbol
Vdd
Min
2.7
Typ
3.5 20
Max
5.3
Units
V A
Vapc= 0.06V
Idd Vapc Iapc Zin Zout 0
Vdd - 0.3 3 50 50 1 2
V mA s
Tr to (Pout1 - 0.5 dB) Vapc set to achieve Pout1
tr,tf
2
EGSM Electrical Characteristics
Test conditions Vdd= +3.5V, a pulse width of 1154 s and a duty cycle of 25% at a case temperature of +25C unless otherwise stated.
Parameter
Frequency Range Output Power Nominal Conditions Efficiency Output Power in off mode Input Power Input VSWR Stability
Test Conditions
Symbol
Fo
Min
880 34.5 55
Typ
900 35 60 -40
Max
915
Units
MHz dBm %
Pin = +2 dBm Vapc = 2.2V Pout=Pout1 Vapc = 0.2V, Pin = 4 dBm
Pout1 PAE
-36 4 2.5
dBm dBm
Pin Pin = 0 dBm Vdd = 3.0 to 5.3V, Pin = 0 - 4 dBm, Pout 34.5 dBm, Vapc 2.2V, VSWR 8:1, all phases Vdd = 3.0 to 5.3V, Pin = 0 - 4 dBm, Pout 34.5 dBm, Vapc 2.2V, VSWR 10:1, all phases t = 20 sec Vdd = 3.5V Pin = 0 dBm Pout = 34.5 dBm Vapc = controlled for Pout Vdd = 3.5V Pin = 0 dBm Pout = 34.5 dBm Vapc = controlled for Pout Vdd = 3.5V Pin = 0 dBm Pout = 34.5 dBm Vapc = controlled for Pout F=925 to 935 MHz, Pout 34.0 dBm, Pin = 0 dBm RBW = 100 kHz F = 925 to 960 MHz, Pout 34.0 dBm, Pin = 0 dBm RBW = 100 kHz Measured at DCS freq EGSM signal: Vdd = 3.5V Pin = +2 dBm Pout = 34.5 dBm (fixed) Pout = -5 dBm to Pout Pin = 0 - 4 dBm Pout = 6 dBm to Pout Pin = 0 - 4 dBm Pout = 6 dBm to Pout 2Fo
0
2 1.5
No parasitic oscillation > -36 dBm
Load mismatch robustness
No module damage or permanent degradation
Second Harmonic
-5
dBm
Third Harmonic
3Fo
-5
dBm
Fourth to Eighth Harmonics
4Fo-8Fo
-10
dBm
Noise Power
Pn
-72
dBm
Pn
-82
dBm
Band to Band Isolation
-25
dBm
Control Slope (Peak) AM-AM AM-PM
400 5 6
dB/V dB/dB deg/dB
3
DCS & PCS Electrical Characteristics
Test conditions Vdd= +3.5V, a pulse width of 1154 s and a duty cycle of 25% at a case temperature of +25C unless otherwise stated.
Parameter
Frequency Range Output Power Nominal Conditions Efficiency Output Power in off mode Input Power Input VSWR Stability
Test Conditions
DCS PCS Pin = 2 dBm Vapc = 2.2V Pout = Pout1 Vapc = 0.2V, Pin = 4 dBm
Symbol
Fo Pout1 DCS PAE PCS PAE
Min
1710 1850 32.0 50 50
Typ
1750 1880 32.5 56 56 -40
Max
1785 1910
Units
MHz dBm %
-36 4 2.5
dBm dBm
Pin Pin = 0 dBm Vdd = 3.0 to 5.3V, Pin = 0 - 4 dBm, Pout 32 dBm, Vapc 2.2V, VSWR 8:1, all phases Vdd = 5.3V, Pin = 0 - 4 dBm, Pout 32 dBm, Vapc 2.2V, VSWR 10:1, all phases t = 20 sec Vdd = 3.5V Pin = 0 dBm Pout = 32 dBm Vapc = controlled for Pout Vdd = 3.5V Pin = 0 dBm Pout = 32 dBm Vapc = controlled for Pout Vdd = 3.5V Pin = 0 dBm Pout = 32 dBm Vapc = controlled for Pout F = 1805 to 1880 MHz, F = 1930 to 1990 MHz, Pout 31.5 dBm, Pin = 0 dBm RBW = 100 kHz Pout = -5 dBm to Pout1 Pin = 0 - 4 dBm Pout = 6 dBm to Pout1 Pin = 0 - 4 dBm Pout = 6 dBm to Pout1 2Fo
0
2 1.5
No parasitic oscillation > -36 dBm
Load mismatch robustness
No module damage or permanent degradation
Second Harmonic
-5
dBm
Third Harmonic
3Fo
-5
dBm
Fourth to Eighth Harmonics
4Fo - 8Fo
-10
dBm
Noise Power
Pn
-77
dBm
Control Slope (Peak) AM-AM AM-PM
350 5 6
dB/V dB/dB deg/dB
4
GPRS Electrical Characteristics
Test conditions Vdd= +3.5V, a pulse width of 1154 s and a duty cycle of 25% at a case temperature of +25C unless otherwise stated.
Psat: Pin = 0 dBm; Vapc = 2.2V Pout (dBm) 880 MHz
Class 8 (1-slot) Class 10 (2-slot) Class 12 (4-slot) 35.18 35.15 35.16
900 MHz
35.40 35.45 35.32
915 MHz
35.40 35.43 35.36
PAE (%) 880 MHz
60.23 60.07 60.09
900 MHz
60.47 61.02 59.62
915 MHz
59.55 59.77 59.35
Psat: Pin = 0 dBm; Vapc = 2.2V Pout (dBm) 1710 MHz
Class 8 (1-slot) Class 10 (2-slot) Class 12 (4-slot) 33.00 33.00 33.00
1750 MHz
33.08 33.08 33.08
1785 MHz
33.12 33.10 33.10
PAE (%) 1710 MHz
59.00 59.35 59.35
1750 MHz
59.19 59.42 59.42
1785 MHz
59.62 59.40 59.40
Psat: Pin = 0 dBm; Vapc = 2.2V Pout (dBm) 1850 MHz
Class 8 (1-slot) Class 10 (2-slot) Class 12 (4-slot) 33.10 33.10 33.10
1880 MHz
33.10 33.10 33.04
1910 MHz
33.02 33.02 32.96
PAE (%) 1850 MHz
59.14 59.14 58.75
1880 MHz
58.93 58.93 58.50
1910 MHz
58.66 58.66 58.25
5
Typical Performance
Test conditions: Vdd = +3.5V, case temperature of +25C, and Zo=50 ohms unless otherwise stated.
37 36 35
Pout (dBm)
64 62 60
Pout (dBm) PAE (%)
34 33 32 31 30 PAE Pout 29 28 2.7
58 56 54
Pout (dBm) PAE (%)
34 33 32 31 30 PAE Pout 29 28 2.7
58 56 54 52 50 48 46 3.9
PAE (%) Idd (mA) Idd (mA)
34 33 32 31 2.7 PAE Pout
58 56 54 52 3.9
52 50 48 46 3.9
2.9
3.1
3.3 Vdd (V)
3.5
3.7
2.9
3.1
3.3 Vdd (V)
3.5
3.7
2.9
3.1
3.3 Vdd (V)
3.5
3.7
Figure 1. PAE and Pout vs Vdd (EGSM Band, Pin = 2 dBm, Vapc = 2.2V).
40 30 20 10
Pout (dBm)
Figure 2. PAE and Pout vs Vdd (DCS 1750 MHz, Pin = 2 dBm, Vapc = 2.2V).
2000 1800 1600 1400
Pout (dBm) Idd (mA)
Figure 3. PAE and Pout vs Vdd (PCS 1880 MHz, Pin = 2 dBm, Vapc = 2.2V).
40 30 20 10
Pout (dBm) Idd (mA)
40 30 20 10 0 -10 -20 -30 -40 -50 -60 0.75 1.25 1.75 Vapc (V) 2.25 Idd Pout
1000 900 800 700 600 500 400 300 200 100 0
1000 900 800 700 600 500 400 300 Idd Pout 200 100 0 1.25 1.75 Vapc (V) 2.25
0 -10 -20 -30 -40 -50 -60 0.75 1.25 1.75 Vapc (V) 2.25 Idd Pout
1200 1000 800 600 400 200 0
0 -10 -20 -30 -40 -50 -60 0.75
Figure 4. Pout and Idd vs Vapc (EGSM Band, Pin = 0 dBm, Vdd = 3.5V).
40 30 20 10
Pout (dBm)
Figure 5. Pout and Idd vs Vapc (DCS 1750 MHz, Pin= 0 dBm, Vdd = 3.5V).
2000 1800 1600 1400
Idd (mA)
Figure 6. Pout and Idd vs Vapc (PCS 1880 MHz, Pin= 0 dBm, Vdd = 3.5V).
1000 900 800 700
Pout (dBm) Idd (mA)
40 30 20 10
Pout (dBm)
40 30 20 10 0 -10 -20 -30 -40 -50 -60 0.75 1.25 1.75 Vapc (V) 2.25 Idd Pout
1000 900 800 700 600 500 400 300 200 100 0
0 -10 -20 -30 -40 -50 -60 0.75 1.25 1.75 Vapc (V) 2.25 Idd Pout
1200 1000 800 600 400 200 0
0 -10 -20 -30 -40 -50 -60 0.75 1.25 1.75 Vapc (V) 2.25 Idd Pout
600 500 400 300 200 100 0
Figure 7. Pout and Idd vs Vapc (Vdd EGSM Band, Pin = 0 dBm, Vdd = 3.0V).
Figure 8. Pout and Idd vs Vapc (DCS 1750 MHz, Pin = 0 dBm, Vdd = 3.0V).
Figure 9. Pout and Idd vs Vapc (PCS 1880 MHz, Pin = 0 dBm, Vdd = 3.0V).
6
Typical Performance, continued
Test conditions: Vdd = +3.5V, case temperature of +25C, and Zo=50 ohms unless otherwise stated.
-10 -15 -15
HARMONICS (dBm)
-10
-25
-28
HARMONICS (dBm) HARMONICS (dBm)
-20 -25 -30 2nd Fo 3rd Fo -35 -40 880
-31
-20
-34
-25 2nd Fo 3rd Fo -30 1710 1720 1730 1740 1750 1760 1770 1780 FREQUENCY (MHz) -37 2nd Fo 3rd Fo 1870 1880 1890 1900 1910
885
890
895
900
905
910
915
-40 1850 1960
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 10. 2nd and 3rd Harmonic Performance (EGSM Band, Pin = 0 dBm, Pout = 34.5 dBm, Vdd = 3.5V).
-10 -15
Figure 11. 2nd and 3rd Harmonic Performance (DCS Band, Pin = 0 dBm, Pout = 32 dBm, Vdd = 3.5V).
-15
Figure 12. 2nd and 3rd Harmonic Performance (PCS Band, Pin = 0 dBm, Pout = 32 dBm, Vdd = 3.5V).
-20 2nd Fo 3rd Fo
-20
HARMONICS (dBm) HARMONICS (dBm)
-25
HARMONICS (dBm)
-20 -25 -30 -35 -40 880 2nd Fo 3rd Fo 885 890 895 900 905 910 915
-25
-30
-30 2nd Fo 3rd Fo -35 1710 1720 1730 1740 1750 1760 1770 1780 FREQUENCY (MHz)
-35
-40 1850
1860
1870
1880
1890
1900 1910
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 13. 2nd and 3rd Harmonic Performance (EGSM Band, Pin = 0 dBm, Pout = 34.5 dBm, Vdd = 3.0V).
-51 -52
Figure 14. 2nd and 3rd Harmonic Performance (DCS Band, Pin = 0 dBm, Pout = 32 dBm, Vdd = 3.0V).
-40
Figure 15. 2nd and 3rd Harmonic Performance (PCS Band, Pin = 0 dBm, Pout = 32 dBm, Vdd = 3.0V).
-36
-41 -52
ISOLATION (dBm) ISOLATION (dBm)
-37
ISOLATION (dBm)
-53 -53 -54 -54 -55 -55 880 885 890 895 900 905 3.0V 3.5V 910 915
-42
-38
-43
-39
-44
3.0V 3.5V
-40
3.0V 3.5V 1860 1870 1880 1890 1900 1910
-45 1710 1720 1730 1740 1750 1760 1770 1780 FREQUENCY (MHz)
-41 1850
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 16. Isolation Performance (EGSM Band, Pin = 4 dBm, Vapc = 0.2V).
Figure 17. Isolation Performance (DCS Band, Pin = 4 dBm, Vapc = 0.2V).
Figure 18. Isolation Performance (PCS Band, Pin=4 dBm, Vapc=0.2V).
7
Typical Performance, continued
Test conditions: Vdd = +3.5V, case temperature of +25C, and Zo=50 ohms unless otherwise stated.
300 250 Idd/Vapc Pout/Vapc 3000 2500 350 300 Idd/Vapc Pout/Vapc 3500 3000 300 250 Idd/Vapc Pout/Vapc 3000 2500 2000 1500 1000 500 0 1.40 1.90 Vapc (V) 2.40
Pout/Vapc (dB/V)
Pout/Vapc (dB/V)
Pout/Vapc (dB/V)
Idd/Vapc (mA/V)
Idd/Vapc (mA/V)
200 150 100 50 0 0.95
2000 1500 1000 500 0 1.45 Vapc (V) 1.95 2.45
200 150 100 50 0 0.90
200 150 100 50 0 0.70
2000 1500 1000 500 0 1.20 1.70 Vapc (V) 2.20
Figure 19. Pout/Vapc and Idd/Vapc vs. Vapc (EGSM band, Vdd = 3.5V).
300 250 Idd/Vapc Pout/Vapc 3000 2500
Figure 20. Pout/Vapc and Idd/Vapc vs. Vapc (DCS 1750 MHz, Vdd = 3.5V).
300 250 Idd/Vapc Pout/Vapc 3000 2500
Figure 21. Pout/Vapc and Idd/Vapc vs. Vapc (PCS 1880 MHz, Vdd = 3.5V).
300 250 Idd/Vapc Pout/Vapc 3000 2500 2000 1500 1000 500 0 1.40 1.90 Vapc (V) 2.40
Pout/Vapc (dB/V)
Pout/Vapc (dB/V)
Pout/Vapc (dB/V)
Idd/Vapc (mA/V)
200 150 100 50 0 0.95
2000 1500 1000 500 0 1.45 Vapc (V) 1.95 2.45
200 150 100 50 0 0.90
2000 1500 1000 500 0 1.40 1.90 Vapc (V) 2.40
Idd/Vapc (mA/V)
200 150 100 50 0 0.90
Figure 22. Pout/Vapc and Idd/Vapc vs. Vapc (EGSM band, Vdd = 3.0V).
Figure 23. Pout/Vapc and Idd/Vapc vs. Vapc (DCS 1750 MHz, Vdd = 3.0V).
Figure 24. Pout/Vapc and Idd/Vapc vs. Vapc (PCS 1880 MHz, Vdd = 3.0V).
8
Idd/Vapc (mA/V)
Idd/Vapc (mA/V)
250
2500
Demo Board Schematic for PA Only
Vdd C13 C14 14 DCS/PCS RFin 18 Agilent Vdd 20 C2 21 C3 23 C4 24 C5 EGSM RFin Vdd 26 1 C7 4 7 C8 ACPM-7891 YYWW C9 EGSM RFout 11 C11 DCS/PCS RFout Component Label C2 C3 C4 C5 C7 C8 C9 C11 C13 C14 Component Value .033 F 12 pF 220 pF .033 F 220 pF 33 pF .033 F 33 pF .033 F 27 pF
Vdd
Pin Description Table No.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
Function
Gnd Vapc EGSM Gnd Vdd3 EGSM Gnd Gnd RFout EGSM Gnd Gnd Gnd RFout DCS/PCS Gnd Gnd Vdd3 DCS/PCS Gnd Vapc DCS/PCS Gnd RFin DCS/PCS Gnd Vdd1,2 DCS/PCS Vdd1,2 Bypass Gnd Vdd1,2 Bypass Vdd1,2 EGSM Gnd RFin EGSM
Description
EGSM Control Voltage EGSM Supply 3rd stage
Notes
See datasheet Figure 4 3.5V nominal - output stage, bypass with 0.033 F//220 pF[1]
EGSM Output
50 nominal, external d.c. blocking required - 33 pF
DCS/PCS Output
50 nominal, external d.c. blocking required - 33 pF
DCS/PCS Supply 3rd stage DCS/PCS Control voltage DCS/PCS Input DCS/PCS Supply 1st and 2nd stages DCS/PCS 1st and 2nd stage bypassing EGSM 1st and 2nd stage bypassing EGSM Supply 1st and 2nd stages EGSM Input
3.5V nominal - output stage, bypass with 0.033 F//27 pF[1] See datasheet Figure 5 (DCS) and Figure 6 (PCS) +2 dBm GMSK, 50 nominal, internally d.c. blocked 3.5V nominal - driver stages, bypass with 0.033 F bypass with 12 pF bypass with 220 pF 3.5V nominal - driver stages, bypass with 0.033 F +2 dBm GMSK, 50 nominal, internally d.c. blocked
Note: 1. In addition a 2.2 F capacitor should be connected to pins 4 and 14 or alternatively star connections can be made from a single 2.2 F capacitor keeping the connection distances as short as possible.
9
Ordering Information Part Number
ACPM-7891-BLK ACPM-7891-TR1
No. of Devices
10 1000
Container
Bulk 13" Tape and Reel
Package Dimensions
0.0430 (1.09) 0.1932 (4.91) 0.2282 (5.80)
0.4724 (12.00) 0.4424 (11.24) 0.4142 (10.52) 0.3670 (9.32) 0.3197 (8.12) 0.2792 (7.09) 0.2725 (6.92) 0.2252 (5.72) 0.1932 (4.91) 0.1780 (4.52) 0.1307 (3.32) 0.0835 (2.12) 0.0582 (1.48) 0.0352 (0.92) 0.0080 (0.20)
0.0590 (1.50) 17 18 19 20 16 15 14 13 12 11 0.4644 (11.80) 0.4295 (10.91)
YYWWDDLLLL
21
10 9 8 7 6 5
22 23 24 25 26
Agilent ACPM-7891
1
2
3
4
0.0430 (1.09) 0.0300 (0.76) 0.0000 (0.00)
0.0000 (0.00)
0.0382 (0.92) 0.0582 (1.48) 0.0835 (2.12)
0.1307 (3.32)
0.1780 (4.52)
0.2062 (5.24)
TOP VIEW Note: Measurements are in inches (millimeters).
END VIEW
BOTTOM VIEW
10
0.2362 (6.00)
Tape Dimensions and Device Orientation
REEL
PIN 1 position (permanent)
YYWWDDLLLL Agilent ACPM-7891
CARRIER TAPE USER FEED DIRECTION COVER TAPE
ACPM-7891 carrier tape ACPM-7891 in carrier tape
CARRIER TAPE
4.000.10 (0.1560.004) 2.000.10 (0.0780.004)
1.500.100 (0.0590.004) 1.750.100 (0.0680.004)
0.300.05 (0.0120.00)
11.50 0.10 (0.4490.004) 12.20 (0.476) 24.00 0.30 (0.9360.012)
2.25 (0.088)
12.00 (0.468) 6.66 (0.260) 1.50 (0.059)
Notes: Drawing not to scale. Measurements are in millimeters (inches).
DEVICE IN CARRIER TAPE
11
Applications Information
Introduction The Agilent ACPM-7891 provides a cost effective dual or tri-band GSM Power Amplifier (PA) solution with the additional benefit of multi-slot GPRS operation, giving excellent efficiency and extended transmit time. Figure 1 illustrates how the ACPM-7891 fits into a typical dual-band or tri-band terminal design. The device is internally matched to 50 and therefore an effective design can be implemented quickly with a few additional capacitors for d.c. blocking of the output ports and bypassing of the supply pins. The control loop can also be implemented quickly by using an integrated power controller such as the LT1758-2 from Linear Technology. An example using this controller is given later in this note. The required loop performance and stability can be achieved more easily in this way, without the need for complex and time consuming design work around an external error comparator or discrete Schottky diode detector. Demoboards are available, and design engineers can evaluate the RF performance of the ACPM-7891 power amplifier to implement a solution quickly by using this application note in conjunction with the datasheet.
Chipset Transmit
900MHz
ACPM-7891
Switch/Diplexer Coupler Antenna
1800MHz 1900MHz
Baseband
DAC
Loop Control
Receive
900MHz 1800MHz 1900MHz
Figure 1. ACPM-7891 in a Typical Dual-band or Tri-band Terminal.
ACPM-7891 Performance Figure 2 plots the actual output power of the ACPM-7891 PA for GSM900, DCS1800 and PCS1900 bands as a function of the control voltage, Vapc. The input power to the PA is a GMSK modulated RF carrier of a constant power level of 2 dBm. The PA's maximum output power is 35 dBm in the GSM900 band, and 33 dBm for the DCS1800/ PCS1900 band at a control voltage of 2.2V. The input RF carrier and control voltage are both pulsed, following the GSM TDMA characteristic response with a
period of 4.615ms and a duty cycle of 12.5~25% per the GSM standard.
40 35 30 25 20 15 10 5 0 -5 -10 -15 -20 0.75 0.95 1.15 1.35 1.55 1.75 1.95 2.15 EGSM DCS PCS
Pout (dBm)
Vapc (V)
Figure 2. Output Power vs. Control Voltage for the ACPM-7891 Power Amplifier.
12
ACPM-7891 Evaluation There are two options available when evaluating the ACPM-7891. Option A is to use the fully assembled and tested ACPM-7891 Test Board from Agilent which includes the PA and associated passive components. This board can be used to evaluate the basic performance of the PA against the typical electrical characteristics provided in the datasheet. All maximum and minimum PA parameters are verified prior to sending out this board. Option B allows the PA performance to be evaluated within a power control loop environment by using the ACPM-7891 PA Control Board from Agilent which incorporates the commercially available control loop IC LT1758-2 from Linear Technologies. This device is used as an example; however, alternative off-the-shelf power control ICs are available from Linear Technologies, Analog Devices and other suppliers. The ACPM-7891 PA Control Board can be used in conjunction with an LT1758 Demoboard, available from Linear Technologies, which supplies the DAC and timing functions. Alternatively the DAC and timing functions can be supplied by a conventional two channel function generator. Demo Board Test Conditions For both types of demoboards, a common set of test conditions apply. Tables 1 and 2 detail the test conditions for EGSM, DCS and PCS at Vdd = +3.5V, pulse width of 1154 s, and a duty cycle of 25% for a case temperature of +25 C.
Table 1. EGSM Test Conditions.
Parameter Operating Frequency Supply Voltage Input Power Level Control Voltage Temperature Symbol f (MHz) Vdd (V) Pin (dBm) Vapc (V) To (C) Test Condition Tx EGSM frequency range: 880 ~ 915 MHz Nominal voltage 3.5V. Extreme voltage conditions of 2.7V and 5.3V 2 dBm 2 dBm Standard DAC output control level estimated at 0.1 to 2.6V. Maximum Vapc level: Vdd-0.3V -30, +25, +85C
Table 2. DCS/PCS Test Conditions.
Parameter Operating Frequency Supply Voltage Input Power Level Control Voltage Temperature Symbol f (MHz) Vdd (V) Pin (dBm) Vapc (V) To (C) Test Condition Tx DCS frequency range: 1710 ~ 1785 MHz Tx PCS frequency range: 1850 ~ 1910 MHz Nominal voltage 3.5V. Extreme voltage conditions of 2.7V and 5.3V 2 dBm 2 dBm Standard DAC output control level estimated at 0.1 to 2.6V. Maximum Vapc level: Vdd-0.3V -30, +25, +85C
13
Option A ACPM-7891 Test Board Figure 3 shows the schematic for the ACPM-7891 Test Board which provides a straightforward method of testing and evaluating the ACPM-7891. External RF sources, power and Vapc supplies are used. Option B Power Control Loop Design The implementation of a transmitter power control is one of the most engineering-intensive and time-consuming aspects of GSM handset design. It dictates the correct transmit power level and burst shaping in a GSM network. The use of an off-the-shelf power control IC helps simplify the engineering effort and shorten the design cycle time. The ACPM-7891 PA Control Board includes the ACPM-7891 PA, Linear Technology LTC1758-2 power control IC, EGSM/DCS/PCS directional couplers, tri-band diplexer and a 20-pin interface socket designed to work with an LTC1758 demo board from Linear Technology.
24 C5 23 C4 26 EGSM RFin C8 EGSM Vapc 2 20 C2 21 C3 18 DCS/PCS RFin C11 DCS/PCS Vapc 16 1, 3, 5, 6, 8, 9, 10, 12, 13, 15, 17, 19, 22, 25 11 DCS/PCS RFout 14 C14 C13 Vdd Gnd 7 EGSM RFout 4 C7 C9
Figure 3. Schematic of ACPM-7891 Test Board.
Component Label C2 C3 C4 C5 C7 C8 C9 C11 C13 C14
Component Value .033 F 12 pF 220 pF .033 F 220 pF 33 pF .033 F 33 pF .033 F 27 pF
14
Figure 4 depicts the basic block diagram of the ACPM-7891 PA control board, Figure 5 shows the control board layout, and Table 3 details its bill of materials. The supporting LTC1758 demoboard is available upon request from Linear Technology. It has a 900 MHz and an 1800 MHz RF channel controlled by the LTC1758. Timing signals for TXEN are generated on the board using a 13 MHz crystal ref-
erence. The PCTL power control pin is driven by a 10-bit DAC and the DAC profile can be loaded via a serial port. The serial port data is stored in flash memory which is capable of storing eight ramp profiles. The board is supplied preloaded with four GSM power profiles and four DCS power profiles, covering the entire power range. External timing signals can also be used in place of the internal crystal controlled timing.
68 VBATT 33 pF VIN RF LTC1758 SHDN SHDN GND TXEN PCTL TXEN RFin EGSM 26 RFin EGSM VAPC EGSM 2 Vdd EGSM 4 RFout EGSM 7 VCC VPCA ACPM-7891 RFin DCS/PCS 18 14 VAPC DCS/PCS Vdd3 DCS/PCS RFin DCS/PCS RFout DCS/PCS 11 16
2.2 pF 220 pF 33 pF
DIRECTIONAL COUPLER 33 pF 50
DIPLEXER
RFout
50 DIRECTIONAL COUPLER
33 pF
33 pF 220 pF 2.2 pF
DAC
Figure 4. Block Diagram of the ACPM-7891 PA Control Board.
15
Figure 5. ACPM-7891 Control Board Layout.
Table 3. Bill of Materials for ACPM-7891 Control Board.
Qty
1 2 1 2 11 1 2 1 1 1 1 6 5 1 1 1 1 1 1 2 3
Device Type, Component Value & Tolerance
Agilent ACPM-7891 Power Amplifier CAP_C0402-.033F,+80,-20A .033F +80 CAP_C0402- 15pF,5%, 50V, CEA 15pF 5% CAP_C0402- 220pF,10%, 50V, A 220pF10% CAP_C0402- 33pF,5%, 50V, CEA 33pF 5% CAP_C0402- 47pF,5%, 50V, CEA 47pF 5% CAP_C0603- .1F,5%, 20V, CEA .1F 5% CAP_TANT_C0805_T-ECST1AZ225R, CB 2.2F +/-20% CAP_TANT_SMT6032-ECST1AZ225R, CB 2.2F +/-20% CAP_C1206- .47F,+80-20%, A .47F +80-20% CONN20PIN_EDGE20-CONN20PIN,HEAB TP_FLAT-TP JUMPER_2 Murata LDC211G7420H-055, Directional Coupler Murata LDC21897M20H-056, Directional Coupler Murata LFD31897MDP1A010, Diplexer CAP_1812- 22F, 10%, 10V, Taiyo Yuden LMK432 Linear Technology LTC1758_LT_MSOP8, Control Loop IC MCR01J680, 68 5% RC-4-0402-50R0J, 50 5% SMA_3
Reference
U1 C24,C31 C3 C33,C36 C4, C5, C8, C9, C10, C27, C28, C32, C35, C44, C45 C7 C2, C6 C34 C4 C1 J2 TP1, TP2, TP4, TP5, TP6, TP7 J1, J3, J4, J5, J6 X1 X3 X2 C11 U2 R1 R2, R3 RF1, RF2, RF6
16
ACPM-7891 PA Control Board We have designed the ACPM-7891 PA control board to interface with the LTC1758 demo board to simplify engineering efforts. Test Setup I, Figure 6, illustrates the equipment setup if the LTC1758 demo board is to be used with the ACPM-7891 PA Control Board.
Tek 2235
However, the ACPM-7891 PA Control Board can also be tested without using the LTC1758 demo board. Test Setup II, Figure 7, illustrates the equipment setup under that scenario.
Vapc HP E4437B
RAMP HP E4406A
3 dB pad PA Control Board 20 Ways Computer External Signal Control Board
Power Divider
20 dB pad
HP 8593E
Serial Connection
20 dB pad
HP 6623A
Figure 6. Test Setup with the LT1758 Demoboard.
Tek 2235
Vapc
RAMP HP E4406A
HP E4437B
3 dB pad PA Control Board HP 3245A RAMP TX_EN HP 6623A SHDN Vdd
Power Divider
20 dB pad
HP 8593E
20 dB pad
Figure 7. Test Setup without the LT1758 Demoboard.
17
Test Setup I (With Linear Tech Board) Connect an RF signal generator with GMSK modulated signal to RFin EGSM port (RF2) or RFin DCS/PCS (RF1) on the PA control board. The maximum input power at RF1 and RF2 is +10 dBm. Typically +2 dBm is applied for the EGSM, DCS/PCS channels. Connect two measurement instruments, one for spectrum analyzer and the other VSA, to RFout (RF6). The maximum output power should be limited to +35 dBm. Connect the LTC-1758 demo board and the ACPM-7891 PA control board using 20 pinconnection socket. The external signal control board supplies bias voltage to PA control board and three timing signals -- SHDN, TXEN and PCTL -- to generate VPCA signal of the LTC1758. The VPCA signal is Power control voltage output and drives VAPC voltage of ACPM-7891 to define power ramp profile. Figure C2 in Appendix C details the LTC1758 timing diagram. The RF power supply voltage of the PA control board is set by VBATT ADJ on the external signal control board. This voltage can be varied over a 2.7V to 5.3V range and is nominally set to 3.5V. The VBATT voltage can be monitored on TP5 on the PA control board. Linear Technologies supplies the application program associated with the .txt file to be downloaded to the FLASH memory. The program controls the code
level of the DAC, whose data range is -1V to +1V. -1V corresponds to the zero code level and the actual 10-bit DAC range is 0V to +2.048V. The resolution is set about 2mV per step. The first sample of the data file is assigned the "default" value, which is included 1251 sample waveform of input data. This is a "code" value for the Lab View application program. The first sample being the default value and the other 1250 samples being the waveform data to be outputted to the DAC. The default value will then be loaded into all memory locations after the 1250 samples have been loaded. After programming the flash 16k segments the system can be set to run by setting the rotary switch to the programmed memory segment and resetting the external signal control board using the reset switch. Test Setup II (Without Linear Tech Board) Without LTC1758 demo board, we can get the same test result as above test. In this case, the Agilent (HP) 3245A generates two relevant signals, TX_EN and RAMP with synchronized time. Connect an RF signal generator with GMSK modulated signal to RFin EGSM port (RF2) or RFin DCS/PCS (RF1) on the PA control board. Typically +2 dBm is applied for the EGSM, DCS/PCS channels. Connect two measurement instruments, one for spectrum analyzer and the other VSA, to RFout (RF6). The maximum output power should be limited to +35 dBm.
Agilent (HP) E4406A: The Agilent E4406A, transmitter tester is used to measure power level in EGSM/DCS/PCS mode displaying the characteristic time mask. Agilent (HP) E4437B: The signal generator is used to provide GMSK GSM modulated input signal at a defined frequency. Agilent (HP)8593E: The Agilent 8991A is a spectrum analyzer used to measure the output power of diplexer in the frequency and time domain. Tek 2235: The Tek 2235 is an oscilloscope used to monitor RAMP signal and Vapc connected using the test points of PA control board. Agilent (HP) 6623A: The Agilent 6623A, power supply is nominally set to voltage 3.5V for Vdd. SHDN is set to 2.8V as high mode during TXEN and RAMP are enable. Agilent (HP) 3245A: The Agilent 3245A, function generator with two channels is set to two relevant signals based on the GSM specification. One signal generates TX_EN with 2.7V that has a period of 4.615 ms with a duty cycle of 12.5% (577 s) and 216 Hz frequency. This TX_EN connects to TX_EN (TP7) pin on the RF control board. The other signal is RAMP signal that is same as PCTL of LTC1758. This RAMP connects to RAMP (TP6) pin on the RF control board.
18
Test Results Using the demoboard with the Linear Technology IC, the results shown in Table 4 were obtained. The LTC1758 RAMP signal is generated from a DAC and a simple single-pole filter is used to shape the power ramp. The input RF signal is based on the GSM GMSK modulated signal.
The results highlight the excellent power control functionality obtained by using the ACPM-7891 in conjunction with a power loop controller such as the LT1758. Results are given for all three bands, at four example power level settings, with the supply voltage at 3V, 3.6V and 4.3V. The figures show that excellent power output control is maintained over
this supply voltage range, illustrating that the ACPM-7891 can enable designs that meet GSM transmitter specifications.
Table 4. Results with variable Vdd and three point frequency ranges GSM900 Frequency 900 MHz Vdd (V) 3.0 3.6 4.3 GSM5 (33 dBm) Vapc Pout (V) (dBm) 2.00 1.60 1.58 33.07 33.04 33.04 GSM10 (23 dBm) Vapc Pout (V) (dBm) 1.3 1.3 1.3 23.54 23.55 23.56 GSM15 (13 dBm) Vapc Pout (V) (dBm) 1.1 1.1 1.1 13.49 13.51 13.52 GSM19 (5 dBm) Vapc Pout (V) (dBm) 1.0 1.0 1.0 5.09 5.12 5.09
DCS1800 Frequency 1750 MHz Vdd (V) 3.0 3.6 4.3 DCS0 (30 dBm) Vapc Pout (V) (dBm) 2.0 1.7 1.7 30.35 30.32 30.28 DCS5 (20 dBm) Vapc Pout (V) (dBm) 1.3 1.3 1.3 20.20 20.17 20.14 DCS10 (10 dBm) Vapc Pout (V) (dBm) 1.1 1.1 1.1 10.42 10.40 10.37 DCS15 (0 dBm) Vapc Pout (V) (dBm) 1.0 1.0 1.0 0.08 0.06 0.06
PCS1900 Frequency 1880 MHz Vdd (V) 3.0 3.6 4.3 PCS0 (30 dBm) Vapc Pout (V) (dBm) 1.95 1.7 1.7 29.26 29.24 29.20 PCS5 (20 dBm) Vapc Pout (V) (dBm) 1.3 1.3 1.3 20.12 20.10 20.07 PCS10 (10 dBm) Vapc Pout (V) (dBm) 1.1 1.1 1.1 10.64 10.60 10.56 PCS15 (0 dBm) Vapc Pout (V) (dBm) 1.0 1.0 1.0 -0.04 -0.05 -0.09
19
Appendix A ACPM-7891 PA Control Board Layout
Bottom
G GND
Power
Top
20
Appendix B Stencil Design on PCB for ACPM-7891 In order to dissipate heat, additional via holes on the PCB are needed on the printed circuit board. Solder mask should not be applied to thermal/ground plane underneath the vias in a way that will reduce heat transfer efficiency from conductive paddle to ambient. The stencil design enables solder paste to fill up the vias and form a solid conducting bar that further improves the thermal dissipation. A properly designed solder screen or stencil is required to ensure optimum amount of solder paste is deposited onto the PCB pads. The recommended stencil layout is shown in Figure B1. The stencil has a solder paste deposition opening approximately 90% of the PCB pad. Reducing stencil opening of the conductive paddle potentially generate void underneath, on the other hand stencil opening larger than 100% will lead to excessive solder paste smear across the conductive paddle to adjacent I/O pads.
0.236 [6.00] 0.2317 [5.52] 0.189 [4.80] 0.142 [3.60]
0.000 [0.00]
0.024 [0.60]
0.071 [1.80]
0.150 [3.82] 0.236 [2.40] 0.047 [1.20] 0.000 [0.00] 0.220 [5.59]
0.099 [2.52] 0.118 [3.00]
0.043 [1.09] 0.011 [0.26]
0.022 [0.56] 0.022 [0.56]
Figure B1. Recommended Stencil.
21
Appendix C LTC1758 Theory of Operation The LTC1758-2 is a dual band RF power controller for RF power amplifiers operating in the 850 MHz to 2 GHz range. RF power is controlled by driving the RF amplifier power control pins and sensing the resultant RF output power via a directional coupler. The RF sense voltage is peak detected using an on-chip Schottky diode. This detected voltage is compared to the DAC voltage at the PCTL pin to control the output power. The RF power amplifier is protected against high supply current and high power control pin voltages. Internal and external offsets are cancelled over temperature by an autozero control loop, allowing accurate low power programming. The shutdown feature disables the part and reduces the supply current to <1_A. Modes of Operation The LTC1758-2 supports three operating modes: shutdown, autozero and enable. In shutdown mode (SHDN = Low) the part is disabled and supply currents will be reduced to <1_A. VPCA and VPCB will be connected to ground via 100_ switches. In autozero mode (SHDN = High, TXEN = Low) VPCA and VPCB will remain connected to ground and the part will be in the autozero mode. The part must remain in autozero for at least 50_s to allow for the autozero circuit to settle.
In enable mode (SHDN = High, TXEN = High) the control loop and protection functions will be operational. When TXEN is switched high, acquisition will begin. The control amplifier will start to ramp the control voltage to the RF power amplifier. The RF amplifier will then start to turn on. The feedback signal from the directional coupler and the output power will be detected by the LTC1758-2 at the
TOP VIEW
VIN RF SHDN BSEL GND 1 2 3 4 5 10 VCC 9 VPCA 8 VPCB 7 TXEN 6 PCTL
RF pin. The loop closes and the amplifier output tracks the DAC voltage ramping at PCTL. The RF power output will then follow the programmed power profile from the DAC. The LTC1758 datasheet provides more detailed description of the part's operation and can be downloaded from Linear Technology's website.
MS10 Package 10-Lead Plastic MSOP
Figure C1. LTC-1758-2 Pinout.
MODE Shutdown Autozero Enable
SHDN Low High High
TXEN Low Low High
OPERATION Disabled Autozero Power Control
Shutdown
SHDN
Autozero
Enable t1 t2
BSEL TXEN PCTL VPCA VPCB Start Voltage Start Voltage
tS
Note 1
tS: autozero settling time, 50s minimum t1: BSEL change prior to TXEN, 200ns typical t2: BSEL change after TXEN, 200ns typical Note 1: The external DAC driving the PCTL pin can be enabled during autozero. The autozero system will cancel the DAC transient. the DAC must be settled to an offset 400mv before TXEN is asserted high.
Figure C2. LTC1758-2 Timing Diagram.
22
www.agilent.com/semiconductors
For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (916) 788-6763 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6271 2451 India, Australia, New Zealand: (+65) 6271 2394 Japan: (+81 3) 3335-8152(Domestic/International), or 0120-61-1280(Domestic Only) Korea: (+65) 6271 2194 Malaysia, Singapore: (+65) 6271 2054 Taiwan: (+65) 6271 2654 Data subject to change. Copyright (c) 2003 Agilent Technologies, Inc. Obsoletes 5988-8926EN June 18, 2003 5988-9542EN


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